Digital Logic NOR Gate – Universal Gate

Universal Digital Logic NOR Gate

What is Logic Nor Gate

NOR Gate is a digital logic gate (Also known as Universal gate) which gives output “1” only and only when all of its inputs are logic LOW state “0”.

NOR gate is invert of OR Gate. In other words, if we connect NOT gate to the output of OR gate that will become NOR gate.

NOR gate usually has 2 input And 1 output.  But it can have as many inputs as you want according to the requirement. But it will only have 1 output. It is the reversal of OR Gate.

Logic NOR gate

NOR Gate Logic Symbol, Boolean Expression & Truth Table

NOR Gate Boolean Expression

OUT = ( IN1 + IN2 )’

or NOR Gate Boolean Expression

Symbol

There are 3 types of symbols used for NOR gate all over the world.

American National Standards Institute (ANSI)/ MILITARY

International Electrotechnical Commission (IEC)/EUROPEAN

Deutsches Institut für Normung (DIN)/GERMANY

NOR Gate Truth Table

A mathematical table used to specify input to output logic combination of a digital circuit is known as a truth table, the truth table of NOR Gate is given below.

NOR Gate IN1+IN2

NOR Gate Truth Table

NOR Gate Logic Flow Schematic Diagram

NOR Gate Construction and Working Mechanism

Resistor-Transistor Logic

In Resistor-Transistor logic (RTL), Bipolar junction transistor (BJT) are used as switching unit. In this schematic given below, we have used two NPN transistor connected together in parallel.

NPN transistor switch on when there is HIGH input “1“ at its base and they start conducting current. And when its base input is LOW state “0“ then it switches off.

When both of the inputs are LOW state “0“, the NPN connected in parallel will be switched off and the path to the GND will be cutoff. The only path for the current flow remain will be from Vcc to output. Which will flow out as HIGH state “1“.

If there is a single of both HIGH input, then the NPN transistor will turn on and the path to the GND will connect. GND (logic LOW state“0“) will flow out through output as “LOW state 0“. Thus resulting in a truth table given below.

RESISTOR-TRANSISTOR LOGIC NOR Gate

NOR Gate Truth Table

NOR Gate Mos Logic

MOS logic uses the idea of switching with MOSFETs instead of BJTs because of their High switching speed and low power consumption.

The schematic given in the figure below is a NOR gate using MOS logic, There are two NMOSFETs connected in aparallel configuration.

Its configuration and operation are exactly same as RTL logic NOR gate.

NMOSFETs also switch on when there is a HIGH state input at its gate(NMOSFET’s gate). And it switches off when there is LOW state input at its GATE.

When both of the inputs are LOW state “0“ the NMOSFETs will switch off and theonly path for current will be output thus resulting in HIGH state “1“ output.

And when one or both of the inputs are high state “1“ then NMOSFETs will switch on and GND to output path will connect, resulting in LOW state “0“ output.

MOS LOGIC NOR Gate

NOR Gate Truth Table

NOR Gate From Other Logic Gates

Universal gate NAND can be used as NOR gate if placed in a specific configuration shown in the figure given below. NOR gate can be made from OR,NOT gate as shown in the figure given below.

NOR Gate is a Universal Gate. A Universal gate is a gate which can be implemented into any other logic gate or logic function. Some of the basic gate’s implementation are given below.

NOR Gate From NOT Gate

NOR gate can be used as NOT gate if we combine its input together into a single input.

In NOR gate all high state inputs lead to LOW output, and all LOW state inputs lead to HIGH input. Which is exactly the same as aNOTgate. NOT gate implementation diagram is given below.

NOR Gate From OR Gate

NOR gate is opposite/invert of OR gate and viceversa. So inverting output of NOR gate will result in OR gate. To invert NOR gate output, we have to use NOR gate with combined inputs which work as Inverter/NOT gate.The figure of OR gate from NOR gates is given below.

NOR Gate From AND Gate

To better understand the implementation of AND gate using NOR gate one need to know about boolean algebra and De Morgans law.

Conversion of NOR to AND gate Boolean Algebraic expression is given below.

OUT = (IN1.IN2)

OUT‘ = (IN1.IN2)‘                                                         taking complement on both sides.

OUT‘ = (IN1‘+IN2‘)                                                      De Morgans law

OUT‘‘ = (IN1‘+IN2‘)‘                                                    taking complement on both sides.

OUT = {(IN1+IN1)‘+(IN2‘+IN2‘)}‘                                 as IN1= (IN1 + IN1)

So the end result is in the form of NOR gate. As you can see IN1,IN2 is NO Red with themselves and then they are NO Red with each other, to better understand look at the figure given below.

implementation of AND gate using NOR gate

NOR Gate from NAND Gate

NAND gate is invert of AND gate. AND gate design will be the same as illustrated above. There will be an Inverter/NOT gate at the output of AND gate as shown in the figure given below.

NOR Gate from NAND Gate

Multi-Input NOR Gate

NOR gate can have more than 2 inputs and can be used according to the requirements of the schematic design. The truth table of NOR gate with “n” number of input is given below.

MULTI-INPUT NOR GATE

MULTI-INPUT NOR GATE Truth Table

Truth Table

NOTE: In the table given above “X” means “don’t care”. It can be “1”and it can be “0”. Which means, as long as there is a single input carrying “1”, the output will be always “0” so there is no reason to put a check on other inputs, that’s why it’s called “don’t care X”.

Resistor-Transistor Logic

In RTL (Resistor-Transistor Logic), Transistors are used as switching unit. To increase the input lines we have to increase the number of transistors connected in parallel as shown in the figure below.

MOS Logic

The idea to create a Multi-Input NOR gate in MOS logic is exactly same as in RTL logic. Increasing the number of MOSFETs in parallel can potentially increase the number of input lines. The figure given below shows MOS logic NOR gate schematic.

Multi-Input NOR Gate By Cascading 2-Input Gates

Multi-input NOR gate can be made from cascading setup of 2-input NOR gates as shown in the figure given below.

OUT                =          (IN1+ IN2 + IN3)‘

OUT                =          ((IN1 +IN2)’’ + IN3)’

3-Input NOR Gate Cacaded setupSince  (IN1+IN2)‘‘ = (IN1+IN2)

OUT                =          (IN1 + IN2+ IN3 + IN4)’

OUT                =          ((IN1 + IN2)’’ + (IN3 + IN4)’’)’

4-Input NOR Gate Cacaded setup

TTL and CMOS Logic NOR Gate IC’s

Commercially up to 8-input NAND gate’s IC are available in the market. Some of the commonly used IC’s details are given below.

TTL Logic NOR Gates

  • 74LS02 Quad 2-input
  • 74LS27 Triple 3-input
  • 74LS260 Dual 4-input

CMOS Logic NOR Gates

  • CD4001 Quad 2-input
  • CD4025 Triple 3-input
  • CD4002 Dual 4-input

4001 CMOS and 7402 TTL 2-Input NOR Gate

Pinout for 7402 TTL NOR Gate IC

PIN Number Description
1 Output Gate 1
2 Input Gate 1
3 Input Gate 1
4 Output Gate 2
5 Input Gate 2
6 Input Gate 2
7 Ground
8 Input Gate 3
9 Input Gate 3
10 Output Gate 3
11 Input Gate 4
12 Input Gate 4
13 Output Gate 4
14 Positive Supply Voltage

4025 CMOS and 7427 TTL 3-Input NOR Gate

4002 CMOS and 7425 TTL 4-Input NOR Gate

4078 CMOS and 744078 TTL 8-Input NOR Gate

8-Inputs IC NOR Gate

Commonly available NOR Logic Gate IC are given in the table below:

4000       Dual 3 Input NOR Gate + 1 Inverter
4001       Quad 2 Input NOR Gate
4002       Dual 4 Input NOR Gate
4025       Triple 3-Input NOR Gate
4043       Quad NOR R/S Latch
4078       8-Input OR Gate
4572       Hex Gate, Quad NOT, Single NAND, Single NOR
741G02 Single 2-Input NOR Drivers
7403       Quad 2-Input NAND gate with open collector outputs
7423       Expandable Dual 4-Inoput NOR Gate with strobe
7425       Dual 4-Input NOR Gate with strobe
7427       Triple 3 Input NOR Gate
741G27 Single 3-Input NOR Gate
7428     Quad 2-Input NOR Buffer
7433     Quad 2-Input NOR Buffer with open collector outputs
7436     Quad 2-Input NOR Gate (Different Pin out than 7402)
74128    Quad 2-Input NOR line Driver
74135    Quad Exclusive OR / NOR Gate
74232    Quad NOR Schmitt Trigger
74260    Dual  5-Input NOR Gate
74805    Hex 2-Input NOR Drivers
744002  Dual 4-Input NOR Gate
744078  8-Input OR / NOR GATE

NOR Gate Applications

Logic NOR Gate is a universal gate which can be used to construct other basic gates like AND gate. In real life, NOR gates are used in

  • Cell phone
  • Calculators
  • Computing
  • STB
  • Digital Logic Circuits
  • LCD TV
  • Decision Making circuit like Mixer Tanks in the factory
  • Industrial Controllers

You may also read more about Digital Logic gates

Logic NOT Gate – Digital Inverter Logic Gate Digital Logic OR Gate Digital Logic AND Gate Exclusive-NOR (XNOR) Digital Logic Gate

The post Digital Logic NOR Gate – Universal Gate appeared first on Electrical Technology.



April 30, 2018 at 06:20AM by Department of EEE, ADBU: https://ift.tt/2AyIRVT

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Exclusive-NOR (XNOR) Digital Logic Gate

Exclusive-NOR Gate – Digital Logic XNOR Gate

What is Logic XNOR or Exclusive-NOR Gate?

XNOR gate also known as Exclusive-NOR or Exclusive-Negative OR gate is “A logic gate which produces High state “1” only when there is an even number of High state “1” inputs”.

For 2-input gate, it can be interpreted as when both of the inputs are same, then the output is High state and when the inputs are different, then the output is Low state “0”.

XNOR gate can have two or more than two inputs but it has only one output. This gate is also used for equality.

XNOR Gate Logic Symbol, Boolean Expression & Truth Table

XNOR Gate Symbol

There are 3 types of symbols used for XNOR gate all over the world.

American National Standards Institute (ANSI)/ MILITARY

American National Standards Institute (ANSI)/ MILITARY XNOR gate

International Electrotechnical Commission (IEC)/EUROPEAN International Electrotechnical Commission (IEC)/EUROPEAN XNOR gate

 Deutsches Institut für Normung (DIN)/GERMANY XNOR gate Deutsches Institut für Normung (DIN)/GERMANY XNOR gate

Boolean Expression

LOGIC XNOR or Exclusive-NOR Gate

OUT = ( I̅N̅1̅ & I̅N̅2̅) + (IN1 & IN2)      or      OUT = (I̅N̅1̅ + IN2) & (IN1 + I̅N̅2̅)

OR

Boolean Expression for XNOR or Exclusive NOR Gate

 

Truth Table
XNOR gate Truth table

XNOR Gate Logic flow Schematic Diagram

XNOR Gate Logic flow diagram

Construction and Working Mechanism of XNOR Gate

XNOR Gate Using BJT and Diodes

Schematic of XNOR gate using Diodes and BJT (NPN transistor) is given below. In which we have used one NPN transistor, 4 diodes and the resistor between Diode Bridge and NPN is used in series configuration because BJTs operates on input current, not input voltages.XNOR gate using Diodes and BJT

The diodes are used in a bridge configuration (Rectifier) to sort out the input logic into the positive level, means if there is a High state input it will always flow to the base of NPN to switch it on. And the Low state will always flow out to the emitter of NPN transistor.

The transistor is used for switching upon the input logic given to it.

When inputs are different, the high state flow to NPN transistor’s base and turn it ON. The LOW state “0” flow through the negative side of the bridge and flow through NPN’s emitter as output.

When the inputs are same, if it’s LOW state “0” then NPN will never turn on because there be no HIGH state input at its base. So Vcc will flow out as logic high state “1” output. If it’s HIGH state “1” then the NPN will turn on but there will be no Logic 0 to flow through the emitter. So again Vcc will flow out as HIGH state”1” output.

XNOR Gate Using MOSFET and Diodes

Discrete XNOR gate can be made with MOSFET and diodes. XNOR schematic using NMOSFET and diodes is given below. XNOR schematic using NMOSFET and diodes

In this schematic 4 diodes are used in a bridge configuration for sorting out input logic. NMOSFET is used for switching upon input logic. The resistor between Diode Bridge and MOSFET is used in parallel configuration because MOSFETs operates on Gate’s voltages, not current.

When both inputs are different, then the High state will flow to NMOSFET’s gate and the LOW state will flow to NMOSFET’s source to build up potential at its gate, which will switch it ON. And the LOW state “0” will flow out as output.

When both of the inputs are same i.e. if both are HIGH state “1” than the HIGH state will flow to the gate of NMOSFET but there will be no potential at its source so NMOSFET will switch OFF. Hence Vdd (HIGH state “1”) will flow out as HIGH state “1” output. When both inputs are LOW state “0”, again there will be no potential (voltage) at the gate of NMOSFET so it will never turn ON and Vdd will flow out as HIGH state “1” output.

XNOR Gate From other Logic Gates: (Combinational Logic)

XNOR operation can be achieved with a combination of different logic gates.

Boolean expression of XNOR is given below.

Sum of Product

In this expression, we use the sum of Min terms. Min terms are the product of inputs for which output is HIGH state “1”.

SOP expression can be easily implemented with NAND gates.

According to the truth table given above the SOP (sum of product) expression is:

OUT       =            ( I̅N̅1̅ & I̅N̅2̅) + (IN1 & IN2)             Expression 1

OUT       =             (IN1 + IN2)’ + (IN1&IN2)               Expression 2      DE MORGAN’S LAW

Using NOT, AND & OR Gate

Expression 1 can be implemented with NOT, AND, OR gates as shown in the figure given below.

Boolean expression of XNOR Gate Using NOT, AND & OR Gate

Using NOR, AND & OR Gate

Expression 2 uses NOR, AND & OR gate to reduce the number of used gates as shown in the figure given below.

Product of Sum

In this expression, we use the product of Max terms. Max terms are the sum of inputs for which output is LOW state “0”.

POS expression can be easily implemented with NOR gates.

According to the truth table given above the POS (product of sum) expression is :

OUT       =             (I̅N̅1̅ + IN2) & (IN1 + I̅N̅2̅)              Expression 1

This expression can be implemented with NOT, AND, OR gates as shown in the figure given below.

Product of Sum XNOR GATEXNOR Gate From Universal Gates

Universal gates are those gates which can be implemented into any logic gate or logic function.

XNOR Gate From NAND Gate

NAND gate is a universal gate. It can be implemented into any Logic function.

As we have discussed before SOP (sum of product) expression can be easily implemented with NAND gates, so SOP expression for XNOR gate is

OUT       =             { (I̅N̅1̅ & I̅N̅2̅) + (IN1 & IN2) }

OUT’      =             { (I̅N̅1̅ & I̅N̅2̅) + (IN1 & IN2) }’                                  Taking complement on both sides

OUT’      =             { (I̅N̅1̅ & I̅N̅2̅)’ & (IN1 & IN2)’ }                                 De Morgan’s Law

OUT’’    =             { (I̅N̅1̅ & I̅N̅2̅)’ & (IN1 & IN2)’ }’                                 Taking complement on both sides

OUT   =     [ { (IN1 & IN1)’& (IN2 & IN2)’ }’ & (IN1 & IN2)’]’     (IN1 & IN1)’ = I̅N̅1̅

Now, this expression is in NAND form. And can easily be implemented with NAND gates as shown in the figure below.

XNOR Gate From NAND Gate

XNOR Gate From NOR GATE

NOR gate is also a universal gate. It can be implemented into any Logic function.

As we have discussed before POS (product of sum) expression can be easily implemented with NOR gates, so POS expression for XNOR gate is given below

OUT       =             { (I̅N̅1̅ + IN2) & (IN1 + I̅N̅2̅) }

OUT’      =             { (I̅N̅1̅ + IN2) & (IN1 + I̅N̅2̅) }’                                                        Taking complement on both sides

OUT’      =             { (I̅N̅1̅ + IN2)’ + (IN1 + I̅N̅2̅)’ }                                                       De Morgan’s Law

OUT’’    =             { (I̅N̅1̅ + IN2)’ + (IN1 + I̅N̅2̅)’ }’                                                      Taking complement on both sides

OUT    =    [ { (IN1 + IN1)’+ IN2}’ + { IN1 + (IN2 + IN2) }’ ]’     (IN1 + IN1)’ = I̅N̅1̅

Now, this expression is in NOR form. And can easily be implemented with NOR gates as shown in the figure below.POS expression for XNOR gate implemented with NOR gates

Multi-Input Exclusive NOR Gate

XNOR gate gives HIGH state “1” only when there is an even number of HIGH state “1” inputs.

XNOR gate can have more than two inputs but it has only one output.

Truth Table

The truth table of “3” inputs XNOR gate is given below.

truth table of “3” inputs XNOR gate

Construction:

Combinational Logic

Combinational logic is the logic of making a schematic with the help of basic logic gates.

Sum of products (SOP) and products of the sum (POS) are two methods in combinational logic.

Sum of Products

SOP uses the idea of summation of min terms (product of inputs for which output is high)

According to the truth table given above, Sum of product expression and schematic for 3-input XNOR gate is given below.

OUT       =   (I̅N̅1̅ & I̅N̅2̅ & I̅N̅3̅) + (I̅N̅1̅ & IN2 & IN3) + (IN1 & I̅N̅2̅ & IN3) + (IN1 & IN2 & I̅N̅3̅)

Sum of product expression and schematic for 3-input XNOR gate

Product of Sum

POS uses the idea of product of max terms (Sum of inputs for which output is LOW.)

According to the truth table given above, Product of sum expression and schematic for 3-input XNOR gate is given below.

OUT  = (I̅N̅1̅ + I̅N̅2̅ + IN3) & (I̅N̅1̅ + IN2 + I̅N̅3̅)& (IN1 + I̅N̅2̅ + I̅N̅3̅) & (IN1+ IN2+ IN3)

Product of sum expression and schematic for 3-input XNOR gate

TTL and CMOS Logic XNOR Gate IC’s

Some of XNOR ICs with pin configurations is given below.

TTL Logic XNOR Gate

  • 74266 Quad 2-input (with open collector outputs)
  • 747266 Quad 2-inout

CMOS Logic XNOR Gate

  • 4077 Quad 2-Input

4077 CMOS and 74266 TTL XNOR Gate IC (Quad 2-Input)

XNOR ICs with pin configurations

Pinout for 74266 TTL XNOR Gate IC
PIN Number Description
1 Input Gate 1
2 Input Gate 1
3 Output  Gate 1
4 Output  Gate 2
5 Input Gate 2
6 Input Gate 2
7 Ground
8 Input Gate 3
9 Input Gate 3
10 Output Gate 3
11 Input Gate 4
12 Input Gate 4
13 Output Gate 4
14 Positive Supply Voltage

Exclusive NOR Gate Applications

Some common application and uses of XNOR or Exclusive-NOR gate are as follow:

  • It is used in error detecting circuits to detect odd/even parity bits in digital transmission circuits.
  • Also used in encryption and arithmetic circuits as a combination of XNOR zand XOR circuit for low power consumption
  • Also used in security or quantity measuring circuits such as in heat exchanger tank to ring the alarm when the heat or temperature goes up/down.
  • In calculators, computers and digital logic circuits.

You may also read more about Digital Logic gates

Logic NOT Gate – Digital Inverter Logic Gate Digital Logic OR Gate Digital Logic AND Gate

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April 16, 2018 at 03:52AM by Department of EEE, ADBU: https://ift.tt/2AyIRVT

Digital Logic AND Gate

Digital Logic AND Gate

What is a Logic Gate?

A logic gate is used to implement Boolean function by performing a logical operation. It ta  kes binary logic as input and produces binary logic as an output.

A logic gate is basically the building block of a digital circuit. All the digital systems within the world are composed of logic gates.

Logic gates work on binary Logic refer as High-State “1” and Low-State “0”.

These gates have usually two inputs and one output. Combinations of Binary Logic Low ”0” and logic High ”1” is given as inputs to these logic gates, and their corresponding output is produced based on their Boolean functions.

Good to know:

These terms also used in binary logic gates and circuits

0 or 1

Low or High

True or False

ON or OFF

Basic And Derived Logic Gates

AND, OR, NOT, NAND, NOR are the basic logic gates. Basic gate combines together to form Derived logic gates like XOR, XNOR etc.

What is Logic AND Gate

AND Gate is a basic logic gate which provides High-State “1” once all of the inputs to the AND Gate are High-State”1”. If any of the input is Low-State ”0”, than its output is Low-State ”0” .It is also referred to as arithmetic multiply operation.AND gate - Digital logic AND Gate

AND Gate Logic Symbol, Boolean Expression & Truth Table

AND Gate Symbol

There are 3 types of symbols used for AND gate all over the world

American National Standards Institute (ANSI)/ MILITARY

ANS MILITARY

International Electrotechnical Commission (IEC)/EUROPEAN

IEC EUROPEAN

Deutsches Institut für Normung (DIN)/GERMANY

DIN GERMANY

Boolean Expression

C = A.B or C = A & B

Truth Table

A mathematical table used to specify input to output logic combination of a digital circuit is known as a truth table, the truth table of AND Gate is given below.

AND GATE Truth Table

AND Gate Logic Flow Schematic Diagram

LOGIC FLOW SCHEMATIC

Construction and Working Mechanism of AND Gate:

AND Gate using Resistor-Diode Logic(RDL)

In Resistor-Diode Logic (RDL), the diode is used as a switch. In AND Gate, diodes are placed in such configuration when any of the two input is logic-Low “0”, the corresponding diode will become forward bias and logic-Low”0” will flow through output as there is no resistance in its path. When both inputs are logic-High”1” diodes will be reversed biased, Hence Vsupply (Logic High state) will be routed to output C as “1”.

NOTE: There is always diode forward voltage drop of approximately 0.7 volts in the case of silicon and 0.3 volts in the case of the germanium diode.

AND Gate using Resistor-Diode Logic(RDL)

AND Gate using Resistor-Transistor Logic (RTL)

In Resistor-Transistor Logic (RTL), the main switching unit is the transistor. In the figure given below, there are 2 NPN transistors connected in series that switches on with logic level high ”1”, when both of the transistors are turned on, Vcc”1” will flow through output. There is a pull-down resistor connected to the output, Therefore there will be always Logic-Low”0” at the output unless both of the transistors are switched on.

NOTE: RTL logic limitation or disadvantage is that it has high power dissipation due to current flow in base resistors and collector resistors when the BJT’s are switched on.

AND Gate using Resistor-Transistor Logic (RTL)

AND Gate using MOS Logic

In MOS Logic, MOSFETs are used as the main switching unit. As you can see in the figure below the two MOSFET in series are being controlled by the inputsignal, In turn, these NMOSFETs control the other NMOSFET. When both inputs are High-State”1”, the NMOS connected in series activates and successively,NMOS on the OUTPUT side is switched off due to logic low gate input (GND). Thus the only route to output is from Vdd (Logic high).

When any of this input is Low-State”0”, the NMOS connected in series will be switched-off resulting in High State”1” at the gate of NMOS on the OUTPUT side(Switched-on). As the NMOS is switched-on, therefore the output C will be directly connected to GND (Low State”0”).

AND Gate using MOS Logic

AND Gate From Other Logic Gates

AND gate’s function can be achieved by different combinations of different logic gate some of them are given below.

BOOLEAN EXPRESSION:

AND Gate From NAND Gate

C = ((A.B)’)’

From NAND Gate

AND Gate From NOT-NOR Gate

C = A.B

C = (A’+B’)’

From NOT,NOR Gate

AND Gate From NOR GATE

C = (a’+b’)’

C = ((A+A)’ + (B+B)’)’From NOR GATE

Multiple Input AND Gate

As we have established before that AND Gate gives logic High State”1” only and only when all of its inputs are logic High State”1”. It’s“n” number of inputs truth table is given below:

MULTIPLE INPUT AND GATE

Truth Table

NOTE: In the table given below “X” means “don’t care”. It can be “1”and it can be “0”. Which means, as long as there is a single input carrying “0”, the output will be always “0” so there is no reason to put a check on other inputs, that’s why it’s called “don’t care X”.

What would you do if there are more than two inputs needed? The answer is simple.

Resistor-Diode Logic

IN RDL (Resistor-Diode logic) logic, a diode is used on every input line, thus adding diodes can increase the number of input lines as shown in the figure below. Each input is fed to separate diode. Place as many diodes as you would like,to create a Multi-Input AND GATE.

Multi-Input AND GATE RDL (Resistor-Diode logic)Resistor-Transistor Logic

In RTL (Resistor-Transistor Logic), Transistors are used as switching unit. To increase the input lines we have to increase the number of transistors connected in series as shown in the figure below.

Resistor-Trasnsistor Logic RTL AND GateResistor-Trasnsistor Logic RTL

MOS Logic

In MOS logic, the case is same as RTL logic, instead, we increase the number of MOSFETs connected in series at the input side. AND GATE with three input in MOS logic is given below. If you want to add another input, add another NMOS in series.Multi input AND Gate MOS Logic

Cascaded Setup of AND Gates

Multi-input AND gate function can be achieved by cascading Two-Input AND Gate in a specific configuration given below

OUT    =          IN1 & IN2 & IN3

OUT    =          (IN1 & IN2) & IN3Cascaded Setup of AND Gates

OUT    =          IN1 & IN2 & IN3 & IN4

OUT    =          (IN1 & IN2) & (IN3 & IN4)

4 input cascade combination

TTL and CMOS Logic AND Gate IC’s

Commercially up to Four-Input AND gate IC’s are available in the market, having two AND gates in a single package. Some of the ICs with Pin Details are given below.

TTL Logic AND Gates

  • 74LS08 Quad 2-input
  • 74LS11 Triple 3-input
  • 74LS21 Dual 4-input

CMOS Logic AND Gates

  • CD4081 Quad 2-input
  • CD4073 Triple 3-input
  • CD4082 Dual 4-input

7408 TTL and 4081 CMOS AND Gate IC (Two-Inputs)

7408 TTL and 4081 CMOS AND Gate IC (Two-Inputs)

Pinout for 7408 TTL AND Gate IC

PIN Number Description
1 Input Gate 1
2 Input Gate 1
3 Output  Gate 1
4 Input Gate 2
5 Input Gate 2
6 Output Gate 2
7 Ground
8 Output Gate 3
9 Input Gate 3
10 Input Gate 3
11 Output Gate 4
12 Input Gate 4
13 Input Gate 4
14 Positive Supply Voltage

4073 CMOS and 7411 TTL AND Gate IC (Three-Inputs)

Three-Inputs IC

4082 CMOS and 7821 TTL AND Gate IC (Four-Inputs)

Four-Inputs IC

AND Gate Applications

Common uses and application of AND gate are follow:

  • As enable gate (Allowance of data through a channel).
  • As inhibit gate (Reverse of enable gate i.e. disallowance of data through a channel).
  • In the clock counters as enable and disable gate.
  • Used in security devices e.g security lights and flood lights as PIR (Passive infrared) Device.
  • In most of counting, computers and logic based digital circuits,

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April 14, 2018 at 02:43AM by Department of EEE, ADBU: https://ift.tt/2AyIRVT