APPLY HERE
Location: Bengaluru and Noida
Company: Cadence
- Design and implement DFT IP w/ Verilog/SystemVerilog and/or VHDL
- Design and implement RTL for DFT IP incl. POST, IST
- Develop synthesis automation for DFT IP including synthesis and timing constraints, RTL insertion and verification
- Own and maintain, extend, and enhance existing DFT IP like LBIST
The post JOB: Design Engineering Architech At Cadence In Bengaluru and Noida appeared first on Electronics For You.
View more at https://www.electronicsforu.com/career/design-engineering-architech-cadence-bengaluru-noida.
Credit- EFY. Distributed by Department of EEE, ADBU: https://tinyurl.com/eee-adbu
Curated by Jesif Ahmed
