Design Verification Engineer for IP development team. Position is based in Bangalore, part of Cadence IP Group. Verification role for Serial and Interface Design IPs verification (PCIe, CCIX, CXL, USB, Ethernet, SATA/SAS, UFS, SPI, HDMI, MIPI, I3C) UVM testbench development to build a robust, scalable, and efficient testbench to verify the design IPs. In addition […]
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