Responsibilities Define the microarchitecture of Memory buffer chips. This involves starting with industry standard specifications, defining sub-systems (e.g. Tx/Rx/Clocking/Data-path/Power Management) implementations using analog/digital IPs. Create specifications for sub-systems on chip (e.g. Tx/Rx/Clocking/Data-path/Power Management) digital-analog interfaces and partitions pin-outs, bump-outs, floor plans functionalities to support the protocol/system level requirements algorithm for digital calibrations of analog circuits […]
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Credit- EFY. Published by Department of EEE, ADBU: tinyurl.com/eee-adbu
